Lift: Future-Proofing High Performance Applications

Oxford e-Research Centre
March 1, 2017 - 13:00
Access Grid Room, 277

7 Keble Road Oxford OX1 3QG

  • Seminar
  • Open to all
  • Many-Core Series
  • Lunch provided

Christophe Dubach from University of Edinburgh will present a seminar on Lift, a novel high-level data-parallel programming model for GPUs.


Graphic processors (GPUs) are the cornerstone of modern heterogeneous systems. GPUs exhibit tremendous computational power but are notoriously hard to program. High-level programming languages have been proposed to address this issue. However, they often rely on complex analysis in the compiler and device-specific implementations to achieve maximum performance. This means that compilers and software implementations need to be re-tuned for every new device. In this talk, I will present Lift, a novel high-level data-parallel programming model. The language is based on a surprisingly small set of functional primitives which can be combined to define higher-level algorithmic patterns. A system of rewrite-rules is used to derive device-specific optimised low-level implementations of the algorithmic patterns. The rules encode both algorithmic choices and low-level optimisations in a unified system and let the compiler explore the optimisation space automatically. Preliminary results show this approach produces GPU code that matches the performance of highly tuned implementations of several computational kernels including linear algebra operations.

About the speaker

Christophe Dubach received his Ph.D in Informatics from the University of Edinburgh in 2009 and holds a M.Sc. degree in Computer Science from EPFL (Switzerland). He is a Lecturer (Assistant Professor) in the Institute for Computing Systems Architecture at the University of Edinburgh (UK). In 2010 he spent one year as a visiting researcher at the IBM Watson Research Center (USA) working on the LiquidMetal project. His current research interests includes high-level programming models for heterogeneous systems, co-design of both computer architecture and optimising compiler technology, adaptive microprocessor, and the application of machine learning in these areas.